In a semiconductor device manufacturing process, vacuum processing such as film formation, etching or the like is performed on a semiconductor wafer (hereinafter, referred to as “wafer”) as a target substrate under a vacuum atmosphere. Recently, in view of improvement of efficiency of the vacuum processing and suppression of oxidation or contamination, there is used a cluster tool type multi-chamber substrate processing system in which a plurality of vacuum processing units is connected to a transfer chamber in a vacuum state and a wafer is transferred to each of the vacuum processing units by a transfer unit provided in the transfer chamber (see, e.g., Japanese Patent Application Publication No. 2000-208589).
In the multi-chamber processing system, a load-lock mechanism, which can be switched between an atmospheric atmosphere and a vacuum atmosphere, is provided between the transfer chamber in the vacuum state and a wafer cassette in an atmospheric atmosphere, and the wafer is transferred between the wafer cassette and the transfer chamber via the load-lock mechanism.
As for a film forming process, a process of heating a wafer to a high temperature of 200° C. or above, e.g., 500° C., may be performed as in the case of employing a CVD (Chemical Vapor Deposition) method. When the multi-chamber processing system is applied to the high temperature process, a high-temperature wafer is transferred from the vacuum processing unit into a chamber of the load-lock mechanism. When the high-temperature wafer is exposed to the atmosphere, the wafer is oxidized. Further, when the high-temperature wafer is accommodated in a container, the container that is generally made of a resin is melted.
Therefore, a cooling plate having a cooling unit for cooling a wafer is provided in the chamber of the load-lock mechanism, and the wafer is positioned near the cooling plate to be cooled by the latter while the inner state of the chamber of the load-lock mechanism is returned from the vacuum state to the atmospheric pressure (see, e.g., Japanese Patent Application Publication No. 2009-182235).
If the high-temperature wafer unloaded from the vacuum processing unit is cooled rapidly, the wafer may be warped due to a thermal expansion difference between a top surface and a backside of the wafer. Therefore, Japanese Patent Application Publication No. 2009-182235 discloses a technique that stops a pressure increase and separate the wafer away from the cooling plate when warpage of the wafer occurs in the load-lock mechanism.
Recently, the wafer is easily warped due to complicated devices formed on the wafer. Further, the warpage of the wafer often occurs before the wafer is loaded into the load-lock mechanism. Accordingly, it is required to effectively cool the wafer while effectively straightening the warped wafer in the load-lock mechanism.